Intellectual Property Rights (IPR)
IIT Indore promotes innovations and facilitates protection of Intellectual Property (IP) of its faculty, other employees and students. While a formal framework to guide the implementation is an evolving process, IIT Indore has a set of empanelled patent attorneys to help the innovator at IIT Indore in the process of successful filling of the patent application. Parties engaged in creations of original and innovative work at IIT Indore include undergraduate and postgraduate students, and faculty members. In the short span of nine years, the institute has filed 36 Indian patent applications and many more are at the filing stage.
| S. No. | Technologies/innovations available at IIT Indore for commercialization purpose |
|---|---|
| 1 | Design Space Exploration System and Method Thereof Using a Bacterial Foraging Optimization Mechanism |
| 2 | Method and System for Automatic Fault Recovery and True Output Extraction during High Level Synthesis |
| 3 | Design Space Exploration of Optimal k-Cycle Transient Fault Tolerant Data path based on Multi-Objective Power-Performance Tradeoff |
| 4 | Improved Schedule Delay Estimation Process for Data path during High Level Synthesis of Application Specific Processors |
| 5 | Design Space Exploration of Optimal Kc-‐Cycle Transient Fault Secured Data-path System with Intelligent Cut Insertion |
| 6 | Design Space Exploration Of An Optimized Hardware Trojan Detectable/Secured Data path During High Level Synthesis |
| 7 | Awaaz: Voice for the Vocally Challenged using Sign Language Gesture Recognition and Leap Motion 3D Infrared Camera, System and Method for Sign Language Gesture Recognition |
| 8 | System and method for emergency services |
| 9 | A Multi-Frequency Based Transceiver |
| 10 | Method and Apparatus for Recording, Archiving, Media Management and Playing back of a Telephone Call |
| 11 | Efficient Liquid Distributor Design for Vertical Falling film Tower |
| 12 | Achieving super subthreshold swing (< 1 mY/decade) in multiple gate junctionless MOSFET through engineering the back gate position |
| 13 | P-N Tuned Differential 8T Static Random Access Memory (SRAM) Cell |
| 14 | Method Device and Apparatus for Managing Phone/Device Profile based on an event |
| 15 | Embedding Watermark based on Multi-Variable Signature Encoding at Behavior Level for Reusable IP Core Protection |
| 16 | 2PRP-PRR Planar Parallel Mechanism |
| 17 | A Passive Parallel Sitting/Lying type Lower Limb Rehabilitation Robot with Leg Orthoses |
| 18 | Improved Performance of DG-TFET with Lateral Asymmetric Channel (LAC) Doping Profile an UnderLap (UL) Feature/High Performance double gate tunnel field effect transistor for low power applications. |
| 19 | Method And System For Providing Smart Communications For Distributed Operations Planning in an Industrial Network |
| 20 | Thermo-Mechanical Test Bench for reliability estimation of Shape Memory Alloy (SMA) Springs |
| 21 | Multiple Gate Tunneling Field Effect Transistor for Capacitorless Dynamic Random Access Memory Applications |
| 22 | Low cost identification of road congestion for traffic management |
| 23 | System, Method and Apparatus for Low Complexity Non-Orthogonal Multiple Access (NOMA) receiver for mixed Constellation |
| 24 | A Six Degree Of Freedom Parallel Manipulator In RPRS Configuration |
| 25 | Dual Ion Beam Sputtered cost-effective and non-volatile resistive memory devices |
| 26 | An Ultra-Low Power, read decoupled-differential write, 10T SRAM cell with larger read/write noise margin |
| 27 | Offset Compensated Data Sensing Technique for Low Energy Embedded SRAM |
| 28 | Method and Apparatus for low complexity Natural Gradient based OFDM Channel Estimator |
| 29 | Read Recharge (RCC) based process variation tolerant 10T SRAM Cell |
| 30 | Method and Apparatus for Embedded Systems based Intervention for Energy Conservation/ System And Method For Electrical Energy Conservation |
| 31 | Low leakage-high stability differential positive feedback controlled 10T (DPFC10T) SRAM cell |
| 32 | Achieving high concentration of two-dimensional electron gas in capped Zno based heterostructure for electron mobility transistor |
| 33 | Design and Development shape memory alloy actuated smart cervical neck collar |
| 34 | High two-dimensional electron gas density in heterostructure of ternary/Quaternary compounds based on Zinc Oxide material |
| 35 | Design and Development of stationary/moving surfaces for impingement jet cooling |
| 36 | Method And Apparatus For Detection Of Active Taps Location In OFDM System |
